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Nanoelectronics/ Device Modeling

The enormous costs to manufacture microelectronical circuits require extensive simulations during design cycles in order to detect errors as early as possible, to calculate parasitic effects of small device components and to adjust the design accordingly. Simulation programs, such as SPICE, allow for the simulation of circuits with thousands of transistors on the electrical level. However, the simulation program requires compact model equations to describe individual components. This allows for realistic calculations of terminal currents and voltages. These so-called compact models represent the central, numerically efficient description of the electrical performance of individual components. Without them, the simulation of complex integrated systems would remain impossible.

At the beginning of the development of a compact model is the comprehensive analysis of the physical performance of individual component structures. This is done with the help of numerical simulations via the finite element method. Based on this, the effects which are dominated by the electrical component performance are identified. By simplifying the physics equations, a compact package equation is developed. Collaboration with technology centers provide measurement data as reference to nanostructured transistors, which are manufactured there in experiments. An implementation via the Verilog-A hardware description language allows for the integration of model packages into standard tools for network simulation.

The Nanoelectronics/ Component Modeling working group is concerned with the development of compact models to describe novel nanoelectronic devices, anticipating future generations of technology. Priorities are for instance the modeling of multiple-gate and junctionless transistor structures or tunnel field-effect transistors. Furthermore, the organic electronics laboratory is integrated in the working group, extending the research activities by the modeling of organic thin film transistors (OTFT).


The "Nanoelectronics" (NAE) lecture for Bachelor’s programs, and the "Solid State Electronics" (FEL) and "Device Simulation" (BSI) lectures of the EIT Master’s program is closely linked to the subject of this working group. Besides the basics of semiconductor physics, the main focus of the practice-oriented tasks lies on the simulation of microelectronical components via the finite element method.


Would you like to work on a project or start as a teaching assistant? Then please contact: This email address is being protected from spambots. You need JavaScript enabled to view it. 

 

 




Head of the Group

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Prof. Dr.-Ing. Alexander Klös

  • Wiesenstrasse 14, 35390 Giessen
    Raum A21.3.16
  • +49 641 309-1926
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Büro: A21.3.16

Alexander Kloes received his diploma and Ph. D. in electrical engineering at the Technical University of Darmstadt, Solid-State Electronics Laboratory, Darmstadt, Germany, in 1993 and 1997, respectively. He worked as Project Manager R&D at Braun GmbH, Kronberg, Germany, from 1997 to 2002, where he focused on IR sensor technology on silicon. Since 2002 he is Professor at Technische Hochschule Mittelhessen, Giessen, Germany. He is heading the Research Group Nanoelectronics / Device Modeling at the Competence Center for Nanotechnology and Photonics. His research interests are in semiconductor device modeling, especially for nanoscale MOS transistors and organic electronics.  Prof. Kloes was associated member in COMON (Compact Modelling Network) and member in DOMINO (Design oriented modeling for flexible electronics), each collaborations between industry and academia funded by the EU. In this context, he is contributing to the research group at Universitat Rovira i Virgili, Tarragona, Spain.

 

Associate Researcher

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Dr. Ghader Darbandy

  • Wiesenstrasse 14, 35390 Giessen
    Raum A21.4.04
  • +49 641 309-1964
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Büro: A21.4.04

Ghader Darbandy is a Research Associate at the Nanoelectronics Device Modeling Research Group, Competence Center for Nanotechnology and Photonics of THM-University of Applied Sciences Mittelhessen in Gießen, Germany. 

His research interests are Emerging Semiconductor Devices, Modeling, and Simulation of Advanced Nanoscale FETs and Organic Transistors, Device Design, Analysis, and Characterization. 

From March 2013 to March 2018, he was a Postdoctoral Researcher at the Chair for Electron Devices and Integrand Circuits (CEDIC) in the Institute of Electrical Engineering and Electronics (IEE), Department of Electrical and Computer Engineering, Technical University Dresden in Dresden, Germany. He was responsible and working for the Silicon Nanowire and Organic/Polymer projects within the Center for Advancing Electronics Dresden (cfaed) cluster of excellence.

 

Ph.D. Graduate Students:

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PhD Student: Atieh Anita Farokhnejad

Büro: A21.4.07

Atieh Anita Farokhnejad received the Bachelor degree in Electronic Engineering from Dr. Shariaty Technical University of Tehran, Iran, in 2012. Since 2015, she holds the M.Sc. degree in Information and Communications issued by Technische Hochschule Mittelhessen in Friedberg, Germany. Currently, she is working towards her Ph.D. degree at the University Rovira i Virgili, Tarragona, Spain in cooperation with the Technische Hochschule Mittelhessen, Giessen. In October 2014 she joined the Research Group Nanoelectronics / Device Modeling. During her thesis, she was working on wavelet transform for analytical calculation of barrier transmission. The focus of her current project is on the capacity model of Tunnel-FET.

 

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PhD Student: Jakob Prüfer

Büro: A21.4.07

Jakob Prüfer holds a bachelor degree in Electronic Engineering (Technische Hochschule Mittelhessen 2015). He is currently working towards the M.Sc. degree in electrical engineering as well at the Technische Hochschule Mittelhessen within the project "SOMOFLEX". This is funded by the German Federal Ministry of Education and Research by the program "IngenieurNachwuchs". It includes simulations, modeling, and probing of flexible organic short-channel thin-film-transistors.

 

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PhD Student: Kerim Yilmaz

  • Wiesenstrasse 14, 35390 Giessen
    Raum A21.4.05
  • +49 641 309-1965
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Büro: A21.4.05

Kerim Yilmaz received the academic degrees B.Sc. and M.Sc. in physics at the Justus Liebig University in Giessen in the years 2012 and 2015. From 2015 to 2017 he worked as a teacher at Technische Hochschule Mittelhessen (THM) in Giessen for the faculty MNI. Since 2017 he is working as a research assistant at the THM and is doing research and development work in the scientific workgroup Nanoelectronics / Device Modeling under the project leadership of Prof. Dr.-Ing. Alexander Klös. His research tasks include the development of physics related modeling approaches for nanowire transistor structures of different types (MOSFET, Junctionless FET, Tunnel-FET, Schottky barrier FET), in particular considering three-dimensional effects on the electrical behavior.

 

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PhD Student: Jakob Leise

Büro: A21.4.07

Jakob Simon Leise received the Bachelor degree in 2016 in Electrical Engineering from the Technische Hochschule Mittelhessen in Wetzlar. He took part in the dual system, working with the Siemens AG in Marburg. During his Bachelor‘s thesis, he dealt with automated database reports using the Microsoft SQL Server Reporting Services. In March 2018, he started working in the research group for nanoelectronics and device modeling. There, he wrote his master thesis in the project "SOMOFLEX" about the capacitance modeling of organic thin-film transistors. Now, he is a Ph.D. student at the Universitat Rovira i Virgili in Tarragona, Spain and he continues his work on the capacitance modeling. Another field of research is the modeling of noise in these transistors.

 

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PhD Student: Aristeidis Nikolaou

  • Wiesenstrasse 14, 35390 Giessen
    Raum A21.4.05
  • +49 641 309-1965
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Büro: A21.4.05

Aristeidis Nikolaou received the academic degrees 5-year Diploma (Integrated Master) and M.Sc. in Electronic and Computer Engineering at the School of Electrical and Computer Engineering of the Technical University of Crete in the years 2016 and 2018 respectively. During his M.Sc. he worked in the field of compact modeling within the projects “EKV3.0 MOST modeling for 12V HVFETs” funded by EM. MICROELECTRONIC MARIN SA., Switzerland and “Compact Modeling of High Total Ionizing Dose Effects in 65nm CMOS” funded by the European Organization for Nuclear Research (CERN). Since June 2019 he is working at the THM in the scientific workgroup Nanoelectronics and Device Modeling under the project leadership of Prof. Dr.-Ing. Alexander Klös.

 

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PhD Student: Christian Römer

  • Wiesenstrasse 14, 35390 Giessen
    Raum A21.4.07
  • +49 641 309-1968
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Büro: A21.4.07

Christian Römer received his academic degree Bachelor of Engineering from Technische Hochschule Mittelhessen (University of Applied Sciences) campus Wetzlar in 2013. During and after his studies he was employed as a project manager in a company’s department of measuring and control engineering / building automation until 2017. In 2019, Christian received his academic degree Master of Science in “Electrical and Computer Engineering” from Technische Hochschule Mittelhessen (University of Applied Sciences) campus Giessen. During his studies, he started working in the research group for nanoelectronics and device modeling and was busy with the measurement and modeling of time-dependent effects in organic thin-film transistors (OTFT).

Since the end of 2019, Christian is a Ph.D. student at the Universitat Rovira i Virgili in Tarragona, Spain. His research field mainly focuses on physics-based compact modeling for Shottky-barrier field-effect transistors (SBFET) and reconfigurable field-effect transistors (RFET).

 

Former Members:

6) Dr. Fabian Horst (2014-2019)
5) Dr. Fabian Hosenfeld (2013-2018)
4) Dr. Michael Gräf (2012-2017)
3) Dr. Thomas Holtij (2010-2014)
2) Dr. Mike Schwarz (2009-2012)
1) Dr. Michaela Weidemann (2005-2009)

2) M.Eng. Franziska Hain (2012-2017)
1) M.Sc. Christian Lammers (2013-2015)


 

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Within the working group, several commercial software tools for the simulation of microelectronic components are present. A Linux High Performance Cluster is used for computations. Software packages such as Matlab are used for developing and simplify the physical model equations. A wafer prober measurement station with parameter analyzer enables contacting and metrological characterization of integrated components under the microscope.

TCAD Sentaurus (Synopsys)
Commercial tool for three-dimensional FEM simulation of microelectronic components. It allows the simulation of the manufacturing process (process simulation) and the electrical performance (device simulation). The tool often provides the basis for the interpretation of the device’s physics and corresponding physical effects. During the courses "Nanoelectronics" (ELI Bachelor’s degree program) and "Device Simulation" (EIT Master’s program), students gain insight into the software.

Cadence Design Framework
Commercial tool for the design and simulation of complex integrated circuits. Using the Verilog-A interface, compact models can be used for circuit simulations.

IC-CAP (Keysight)
Commercial tool for extracting model parameters from measurements or simulations. This Verilog-A compact model can be adjusted to measurement data of collaboration partners or FEM simulations.

Waferprober Cascade RF-1 with analyzer parameters Keysight B1500
Tester (DC and AC) to contact substrates under a microscope (to 6 inches). Thus, the characterization of individual integrated devices is possible without their contacts and housing.

High-performance Linux cluster
The three-dimensional simulation of the electrical performance of individual components often takes hours or even several days. As a countermeasure, we provide a computing cluster with 44 cores.

DIMATIX Material Printer DMP-2831
Printer for organic transistors.

Access to Mentor Graphics Design Framework, MATLAB, LabView
Software tools for mathematical calculations and investigation of mathematical / physical results.

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With the storage capacity of the microelectronical components continuously increasing, the structure size of silicon chips is reduced to a few nanometers. As a result, related physical effects (quantum effects) have gained increasing significance. These effects, on the one hand, limit further miniaturization of conventional device components. On the other hand, innovative concepts making use of these effects lead to continuous improvement in performance and energy-efficiency of a microchip's integrated circuit. This is the field of study we call "Nanoelectronics".

The Nanoelectronics Device Modeling Research Group was founded in 2006 and has been an integral part of the Nanotechnology and Photonics competence center

The focus of the research group is on:

  1. numerical simulation of single transistors (device simulation)
  2. the description of transistors by analytical equations for circuit simulation (compact modelling)

Because of numerous publicly funded research projects, multiple Doctor’s / PhD programs were established in collaboration with Universitat Rovira i Virgili in Spain, Tarragona. Our research group is closely connected to other European research groups, allowing many qualified graduates from THM the chance to engage in self-guided research projects as doctorates.

Our students can contribute to research projects via study or thesis papers to gain insight into research work in an international environment at an early stage of their career. This way, they also strengthen their knowledge of fields such as design and simulation of microelectronical systems, functionality and technology of electronical device components as well as their underlying mathematical structures.

Part of the research group is the Organic Electronics Laboratory which focuses on the development of processes and simulations techniques for devices based on organic materials.