Research Group Nanoelectronics/ Device Modeling

In the development of integrated circuits, fabless companies without manufacturing ability, which are limited solely to the design, play an increasingly important role. Compact models of the circuit elements used in design tools are the essential link between these design houses and external manufacturing facilities. Device structures in the nanometer range require a definition of new compact models which are able to cover physical effects which in the nanoscale come to the fore.

With the reduction of feature sizes in the nanometer range today, alternative device structures (double-gate FET, FinFET) are the subject of worldwideresearch. The control of the channel region is performed by a more than one gate electrode (Multiple-Gate FETs). Multi-dimensional effects determine the electrostatics in the device. With shortening the gate length below 20nm additional physical effects appear, which influence the device behavior significantly. To describe all these effects with a compact model,  new formulations of the current equations are necessary. To this area of research the group contributes by its activities.

Since 2009, the research group is expanding its activities in the field of device modeling in the field of organic semiconductors. For classification of the models in the laboratory test structures are manufactured using the ink jet principle.